FPGA Overview

Field Programmable Gate Arrays (FPGAs) are programmable “chips” dedicated to solving a specific problem.  This makes FPGAs faster, energy and space efficient, and truly parallel.  They have no operating system which is a common source of jitter and overhead.  FPGAs compute “on the clock cycle” as an electrical circuit so there is a level of determinism and speed that even real-time operating systems (RTOS) cannot achieve.

Not all Clock Cycles are Created Equally

We are not the only ones to have case studies showing FPGAs outperform CPUs.  One may think, “how is this possible?”  CPUs are clocked at Gigahertz while FPGAs are still clocked at the Megahertz.  CPUs that run on computers are generic enough to handle all kinds of applications where FPGAs are programmed to handle a specific task or set of tasks.  Note that even amongst CPUs, the famed "Megahertz Myth" demonstrated that merely clock cycles do not indicate better performance.

FPGAs Everywhere?

All these benefits would make one wonder “why aren’t FPGAs being used for everything?”  The answer lies in understanding how one programs & deploys an FPGA.  Because FPGAs run as an electrical circuit, they are configured with special programming languages known as Hardware Description Languages (HDL) such as VHDL and Verilog.  These languages are not as low level as assembly language but one does have to have deeper knowledge of the target hardware.  This could be contrasted with a typical computer language which abstracts the developer from the machine their code will run on.  So it is fair to say that FPGAs present developers with a number of challenges.

High Level HDLs

Recognizing the need for higher level HDLs, tools have been created aimed at making FPGA development easier.  These tools both accelerate the development process, allow for more people to program FPGAs, and expand the set of problems that can be solved with an FPGA.  And let’s not forget the issue of maintenance, once an FPGA has been programmed, we may want to make changes to it and Higher Level HDLs make this process easier.  One still must have some kind of understanding of the target hardware (FPGA) that will run their algorithm so it is best to not get the illusion that FPGA development is now “easy,” but rather “easier.”  When used properly these high level HDLs can accelerate development by 5 to 10 times without putting too much of a dent on the performance of the FPGA.

Performance of High Level HDLs

Historically, whenever a tool is deemed “high level,” its ability to generate efficient code is doubted.  Others argue that one gives up too much control over how the code is generated.  These are fair arguments and can be applied to High Level HDLs.  Luckily, some of the High Level HDLs have been around for nearly ten years now and are reaching a stage of maturity.  Design patterns which generate optimal FPGAs, products developed using these FPGA tools, and case studies have shown that one can effectively leverage the benefits of an FPGA using the High Level HDL tools.

Certainly this is not a situation for “one size fits all” and direct HDL programming has an important and sometimes very critical place in the FPGA development process.  However, as with other High Level tools (e.g. think of how far HTML editors have gone for web site development) we believe that a whole class of FPGA based solutions will rise out of High Level HDL tools that will be too complex to be even benchmarked directly in HDL.  To take a more general example, one could write a complex software program most efficiently in assembly language or they could use a higher level development environment to write it much faster with a slight but acceptable performance hit; think of how many people code in assembly language or compared to how many use high level programming languages.

Getting an FPGA

Xilinx and Altera are the two biggest manufacturers followed by Lattice, Actel, Quicklogic, SiliconBlue, Achronix, Tabula, and Tier Logic.  FPGAs vary in application, power consumption, and interfacing to standard buses to name a few.  But the same way one typically does not order a CPU directly from Intel or AMD, it is common to buy an FPGA from other companies that produce computer boards with FPGAs along with surrounding circuitry for interfacing to the FPGA.  Some provide complete packages with High Level HDLs and FPGA boards.

Accessing the FPGA

Now that we understand the benefits of FPGAs and have general view on how they programmed, we must think about how exactly we will integrate them into our system.  Two system architectures are very popular and they are 1) using the FPGA to process & analyze network data before it goes in or comes out of a computer and 2) using the FPGA as a co-processor to a CPU.  The emphasis here is to interface to the FPGA using a standard bus such as PCI, PCIe, and TCP/IP just to name a few.  And since we are going with a High Level HDL, we might be best served going with an FPGA board t hat is commercial of the shelf (COTS); it would be unfortunate to negate the time/costs savings from using a High Level HDL by developing custom circuitry.

Network Data Analysis

Interestingly enough, many network cards (NICs) already utilize FPGAs to process network data and forward it to the computer’s [software] network stack.  What if we could access that FPGA and put our own algorithm on there to intercept, filter, process messages before entering the computer?  Maybe the FPGA could access data that is on its way out of the computer?  This is very similar to deep packet inspection done by firewalls but instead are looking for good deals coming through on your market data line(s).

Network Data Analysis – Application

This could be used as a line handler to process market/exchange data feeds, news data feeds, and general network traffic.  Some have analogized analyzing market data in software “like drinking from a fire hose” and certainly anyone who has studied market data, especially during those critical bursts, would agree.  The FPGA can have multiple parallel processes for handling different aspects of the exchange data as it comes in and route only what our algorithm has deemed relevant to the computer.  Now, if our main FPGA begins to run out of space, we can have more FPGAs to help out with the processing to form our own “FPGA cluster.”  Using off the shelf hardware, It is now possible to share data between FPGAs in the tens of microseconds.

Co-processing with an FPGA

Specialized PC cards exist for handling sound, video, and other kinds of data but what if we could program an FPGA to run our own kind of analysis.  Imagine having several FPGA cards in a computer that you can program to run valuations or other algorithm.  See our case study on Hardware Acceleration of Monte Carlo Simulation for Option Pricing.